1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuits. More specifically, the present invention relates to improving the conductivity of a buried layer.
The present invention will more specifically be described in the context of the forming of a buried collector layer of a bipolar transistor, but those skilled in the art will realize from reading the present application and as underlined at the end of the present description, that the present invention applies generally to the formation of deep strongly-conductive layers in a semiconductor substrate.
2. Discussion of the Related Art
FIG. 1 very schematically shows a bipolar transistor structure formed in a semiconductor substrate. This bipolar transistor is, in the specific described embodiment, formed in an N-type layer 1 formed by epitaxy on a P-type substrate 2. Under the active area where the transistor is to be formed, an implantation intended to form a heavily-doped N-type buried layer 3 will have been formed, generally prior to the epitaxy. The active transistor area is laterally delimited by a silicon oxide well 5 etched into the surface of epitaxial layer 1, currently designated as an STI, for Shallow Trench Insulation. Inside of the active area are formed a P-type base region 7 and an N-type emitter region 8. Many methods are known to form such regions in properly localized fashion and to take contacts on these regions. Reference will, for example, be made to U.S. Pat. No. 5,953,600 which is incorporated herein by reference. The transistor collector is formed of a portion of epitaxial layer 1 and of an area 9 also of type N implanted opposite to the emitter. The collector is contacted by an N+-type buried layer 3 and by an N+-type conductive well 10 crossing the insulating well 5 and joining the buried layer 3.
When such a transistor is to be operated at a high frequency, one of the main limiting parameters appears to be the collector access resistance, that is, the sum of lateral resistance R1 of buried layer 3 and of vertical resistance R2 of collector well 10.
Various solutions are known to minimize the resistance of collector well 10, by strongly increasing the doping level, by reducing its height, or by forming an opening and filling it with polysilicon and/or other strongly-conductive materials. Thus, the main element of the collector access resistance remains resistance R1 of buried layer 3. Further, the doping of this layer cannot be increased to a maximum, especially since it exhibits risks of exodiffusion to the epitaxial layer and of creation of a ghost layer during epitaxy.
It should further be noted that buried layer 3 has a dual function. On the one hand, it ensures a contact with collector region 1, 9, and on the other hand, it is of a conductivity type opposite to that of the substrate on which the epitaxial layer is formed, to ensure a junction isolation and enable proper biasing of the substrate.